Intel MP Organization

nRegisters - storage locations found inside the processor for temporary storage of data

1- Data Registers (16-bit)

nAX, BX, CX, DX

2- Address Registers (16-bit)

nSegment registers: CS, SS, DS, ES

nPointer registers: SP, BP, IP

nIndex registers: SI, DI

3- Status (Flags) register (16-bit)

Storing data in Registers

Data Transfer from register to memory

Data Transfer from memory to register

1- Data Registers

The general-purpose registers are used in any manner that the programmer wishes. Each general-purpose register is addressable as 32-bit registers (EAX, EBX, ECX, and EDX), as 16-bit registers (AX, BX CX, and DX), or as 8-bit registers (AH, AL, BH, BL, CH, CL, DH, and DL). 

nThe data registers may be used for general purposes, however each has special uses

qAX : Accumulator

qBX : Base

qCX : Count

qDX : Data

nEach byte of the 4 data registers can be accessed independently

qAH, AL, BH, etc.

qThese are referred to as 8-bit registers, but remember they are part of an existing larger register

+Accumulator (AX): often holds the temporary result after an arithmetic -and logic operation. Also addressed as EAX, AH, or AL.

nBX (Base)- often holds the base (offset) address of data located in the memory. Also addressed as EBX, BH, or BL.

nCX (Count): contains the count for certain instructions such as shift count (CL) for shifts, and a counter (CX or ECX) with the LOOP instruction. Also addressed as ECX, CH, or CL.

nDX (Data): is a general-purpose register that also holds the most significant part of the product after a 16- or 32-bit multiplication, the most significant part of the divided before a division, and the I/O port number for a variable I/O instruction. Also addressed as EDX, DH, or DL.

Segment Registers cont.

n20-bit addresses are obtained by combining two 16-bit registers, segment:offset

qAddress = segment*16+offset

nExample     CS: 010C    IP: 14D2

qAddress = 010C*10h+14D2 = 010C0+14D2 Address = 02592

nEach segment is 64K, segments can start at any paragraph boundary

2- Address Registers

nSegment Registers

  Additional registers, called segment registers, generate memory addresses along with other registers in the microprocessor.

nPointer and Index Registers

  Although the pointer and index registers are also general purpose in nature, they are more often used to index or point to the memory location holding the operand data for many instructions. These registers are 16-bit on the 8086, 8088, 80186, and 80286, and 32-bit on the 80386 and 80486 microprocessor. 

Segment Registers 

nCS (code): the code segment is a section of memory that holds programs and procedures used by programs. The code segment is limited to 64K bytes in length in the 8088-80286 and 4G bytes in the 80386/80486. The code segment register defines the starting address of the section of memory that holds code.

nDS (data): the data segment is a section of memory that contains most data used by a program. Data are accessed in the data segment by an address or the contents of other registers that hold the offset address.

nES (extra): the extra segment is an additional data segment that is used by some of the string instructions.

nSS (stack): the stack segment defines the area of memory used for the stack. The stack pointer register determines the location of the current entry in the stack segment. The BP register also addresses data within the stack segment.

  Pointer and Index Registers

nIP (Instruction Pointer): contains the address of the next instruction to be executed

nSP (Stack Pointer): used to address data in LIFO (last-in, first-out) stack memory. This occurs most often when the PUSH and POP instructions are executed or when a subroutine is CALLed or RETurned from in a program. This register is also the 32-bit ESP register.

nBP (Base Pointer): is a general-purpose pointer often used to address an array of data in the stack memory. This register is also the 32-bit EBP register.

nSI (Source Index): used to address source data indirectly for use with the string instructions. This register is also the 32-bit ESI register.

nDI (Destination Index): normally used destination data indirectly for use with the string instructions. This register Is also the 32-bit EDI register. 

Instruction and Stack Pointers

nIP contains the address of the next instruction to be executed

qIP specifies an offset into the CS segment

qIP is not the operand of any instruction

nSP points to the top item on the stack

qSP is an offset into the SS segment

qSP can be used as an operand in some instructions

nBP is a Base Pointer

qSpecifies an offset into any segment, but most commonly the Stack segment

nSI and DI are called Index registers

qThey normally specify an offset into the Data segment, although they can be used as offsets into any segment

qSometimes they hold a number to be added to the address of an array (index)

3- Status Or Flag registers

nIndividual bits are used to store the status of the microprocessor

qBits are set or cleared as the result of many operations

qBits may be affected indirectly (by the execution of an instruction) or directly by an instruction designed to access the status word.

CF (Carry Flag)    : indicates a carry out of leftmost sign bit of a data item following an unsigned arithmetic operation

PF (Parity Flag)    : 0 means even number of ones, 1 means odd number of ones

AF (Auxilry Carry Flag)   : concerned with arithmetic on ASCII and BCD

ZF (Zero Flag)        : Zero result sets it to 1, and nonzero result sets it to 0

SF (Sign Flag)       : +ve  number  sets it to to 0, and –ve value sets it to 1

TF (Trap Flag)       : it causes the processor to execute in a single-step mode i.e. one instruction at a time

IF (Interrupt Flag)   : set by STI instruction and cleared by CLI instruction

DF (Direction Flag)   : when DF=0, the string operation is performed from left to right data transfer, and when DF=1, the string operation is performed from right to left data transfer

OF (Over Flow Flag)   : indicates a carry out of leftmost sign bit of a data item following a signed arithmetic operation

Data-Addressing Modes

Data-Addressing Modes:

  Variations in the way instructions are used. There are 8 different data-addressing modes:

1.Register Addressing

2.Immediate Addressing

3.Direct Addressing

4.Register Indirect Addressing

5.Base-Plus-Index Addressing

6.Register Relative Addressing

7.Base Relative-Plus-Index Addressing

8.Scaled-Index Addressing.

1- Register Addressing

nUses the 8-bit general registers:  ah, al, bh, bl, ch, cl, dh, and dl

nThe 16-bit general registers: ax, bx, cs, dx, sp, bp, si, and di

nThe 32-bit registers: eax, ebx, ecx, edx, esp, ebp, edi, and esi

nAnd the 16-bit segment registers: cs, ds, ss, and es

n

qExample:

mov cx,dx   ; Copies the word-sized contents of register
                 ; dx into register cx

2- Immediate Addressing

nOperates upon a byte or word of data (or DWORD in 386/486 architecture)

nTransfers a copy of the immediate data into a register or a memory location.

nUse hex and binary number conventions (H or h for hex, B or b for binary numbers), otherwise the number is interpreted as decimal.

q

qExample:

  mov al,22h    ; Copies the byte-size data value

               ; 22h into register al

3- Direct Data Addressing

nUses symbolic memory locations (variables) or absolute memory locations.

nNote that with the mov instruction, transfers must involve memory within the data segment and the al, ax, or eax register.

nExamples:

 mov al,number      ; copies the byte contents of memory           ; address number  located
                            ; in the data segment into a

mov there,ax          ; copies ax into memory location there in

                                ; the data segment

mov ch,[1000H]      ; copies the contents of memory location

                                ; 1000H from the data segment into register

                                ; ch.

4- Register Indirect Addressing

nAllows data to be addressed at any memory location through the bp,bx,di, and si registers.

nbx, di, or si registers used to address memory in the data segment

nbp register used to address memory in the stack segment

nThe [ ] symbols denote indirect addressing.

noffset directive tells the assembler to load a register or memory location with the offset address of a memory location and not the contents of the memory location.

nbyte ptr, word ptr, dword ptr directives specify the size of the data

nExamples

  mov ax,[bx]  ; Copies the word-sized data from the data
                      ; segment offset address pointed to by bx
                      ; into register ax.

  mov byte ptr [di],10h  ; specifies that the location
                                     ; addressed by di is a byte-sized
                                     ; memory location